Aspects disclosed herein relate to the field of computer microprocessors (also referred to herein as processors). More specifically, aspects disclosed herein relate to cache tag compression.
Modern processors conventionally rely on caches to improve processing performance. Caches work by exploiting temporal and spatial locality in the instruction streams and data streams of the workload. A portion of the cache is dedicated to storing cache tag arrays. Cache tags store the address of the actual data fetched from the main memory. The speed of determining a hit or a miss in the cache is constrained by the width of the tag array, where larger tag arrays conventionally create more timing pressure. A wider (or larger) tag has more bits. To determine if there is a hit in the cache, all bits of the tag must be compared against the probe address. More bits in the comparison may therefore require more delay to return a result of the comparison.